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Description
This paper presents an implementation of a fully pipelined polynomial Support Vector Machine (SVM) decision function in a Field Programmable Gate Array (FPGA), featuring external training and modifiable vectors. Specifically tuned for pulse shape Gamma-Neutron discrimination within the established NGA-01 Neutron Gamma Analyzer, the method would aid in the differentiation of low-energy pulses. Discrimination is achieved by analyzing the voltage pulse output from an external photomultiplier that gathers light from a scintillation crystal. Here, the primary point of interest is on the tail end of the pulse. The method was shown to have very good separation results in an offline setting. The aim of the paper is thus to create an embedded solution for a real-time application. The SVM is trained on data classified using the conventional tail integral ratio method and is then transformed to avoid division, which better separates the low-energy end. This however, separates the classes non-linearly, so we cannot choose a simple discrimination constant and have to find a separating hyperplane. The computed support vectors can be loaded into the decision function without requiring re-synthesis, allowing for on-the-fly adjustments. This is essential if a different scintillation material is used or if the device is recalibrated, as a single embedded pre-calculated solution would have to be re-synthetized in this scenario. The output of the solution is classification, while the amplitude and total energy can be passed on from the measurement needed for the input. The current design employs 18-bit fixed-point arithmetic and a cubic kernel, chosen to match the FPGA's available DSP multipliers, which have a maximum multiplier width of 18x25 bits. This approach yields a numerical deviation of about 3–5% from a 32-bit floating-point implementation in C due to cumulative error. However, since classification depends on the signum function, this deviation does not impact the results except for values very close to the hyperplane, although this requires further validation. Given that the spectrometer has a 12-bit measurement accuracy, this error can either be disregarded or addressed during training. The primary development goal was to ensure real-time implementation with high-speed performance. Vectors, coefficients, and output values are stored in a register array, allowing full parallel access and significantly reducing the time required for summing the calculated values. A straightforward implementation would require 6 DSP slices per cubic kernel calculation, which is space-intensive on the FPGA. Although theoretically feasible and capable of calculating a different result per clock cycle, it would be inefficient. Given the spectrometer’s high measurement frequency, the decision function is conversely needed only after an entire pulse has been collected. This allows for a state machine that uses a single DSP block per kernel for multiple calculations or a sequential call of kernel calculations, freeing up FPGA resources. Furthermore, no additional multiplication is necessary, as summing operations are implemented via lookup tables. This implies that the maximum number of dynamic vectors depends on the available DSP slices, while the remaining module is structured to handle varying numbers efficiently, with summation scaling logarithmically with the total vector count. As a proof of concept, the design is synthesizable and implementable with current testbenches used to compare the results with the aforementioned C implementation. The registers are currently filled directly in the testbench. Further research requires greater emphasis on the processed data and the offline learning of the decision function.
